Peak Detector
Applications of Operational Amplifiers in Tamil
Peak Detector
- A Peak detector circuit is a circuit that is able to measure the peak amplitude that occurs in a waveform.
- This gives us the highest value of a waveform reaches and it can measure the maximum amplitude value of a signal.
- Peak detector detects and holds the most positive value of attained by the input signal prior to the time when the switch is closed.
Peak Detector
Working of Peak Detector
- During the positive half cycle of Vin:
- The o/p of the op-amp drives D1 on. (Forward biased)
- Charging capacitor C to the positive peak value Vp of the input volt Vin.
- During the negative half cycle of Vin:
- D1 is reverse biased and voltage across C is retained.
- The only discharge path for C is through RL since the input bias IB is negligible.
- For proper operation of the circuit, the charging time constant (CRd ) and discharging time constant (CRL) must satisfy the following condition.
Working of Peak Detector
- CRd <= T/10 --------> (1)
- Where Rd = Resistance of the forward-biased diode.
- T = time period of the input waveform.
- CRL >= 10T ---------> (2)
- Where RL = load resistor.
- If RL is very small so that eqn. (2) cannot be satisfied.
- Use a (buffer) voltage follower circuit between capacitor C and RL load resistor.
- R is used to protect the op-amp against the excessive discharge currents.
- Rcomp = minimizes the offset problems caused by input current
- D2 conducts during the –ve half cycle of Vin and prevents the op-amp from going into negative saturation.
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